netdev - [RFC 2/3] tg3: Use pci_set_power_state() for setting PM states

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Message-Id: <1393281245-3951-2-git-send-email-jdmason@kudzu.us>
Date:	Mon, 24 Feb 2014 15:34:04 -0700
From:	Jon Mason <jdmason@...zu.us>
To:	netdev@...r.kernel.org
Cc:	Nithin Nayak Sujir <nsujir@...adcom.com>,
	Michael Chan <mchan@...adcom.com>
Subject: [RFC 2/3] tg3: Use pci_set_power_state() for setting PM states

Use the existing infrastructure of pci_set_power_state() instead of
setting the relevant bits via PCI config read/write in the driver.
Also, use pci_pme_active() to set the PCI_PM_CTRL_PME_ENABLE bit in PCI
PM control register.  pci_set_power_state() and pci_pme_active() perform
the same operations as the driver did before, so there should be no
functional change.  That being said, this has not been tested.

Signed-off-by: Jon Mason <jdmason@...zu.us>
Cc: Nithin Nayak Sujir <nsujir@...adcom.com>
Cc: Michael Chan <mchan@...adcom.com>
---
 drivers/net/ethernet/broadcom/tg3.c | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 3167ed6..36c3fd9 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -16362,22 +16362,14 @@ static int tg3_get_invariants(struct tg3 *tp, const struct pci_device_id *ent)
 		 * for all chip writes not to mailbox registers.
 		 */
 		if (tg3_flag(tp, PCIX_MODE)) {
-			u32 pm_reg;
-
 			tg3_flag_set(tp, PCIX_TARGET_HWBUG);
 
 			/* The chip can have it's power management PCI config
 			 * space registers clobbered due to this bug.
 			 * So explicitly force the chip into D0 here.
 			 */
-			pci_read_config_dword(tp->pdev,
-					      tp->pdev->pm_cap + PCI_PM_CTRL,
-					      &pm_reg);
-			pm_reg &= ~PCI_PM_CTRL_STATE_MASK;
-			pm_reg |= PCI_PM_CTRL_PME_ENABLE | 0 /* D0 */;
-			pci_write_config_dword(tp->pdev,
-					       tp->pdev->pm_cap + PCI_PM_CTRL,
-					       pm_reg);
+			pci_set_power_state(tp->pdev, PCI_D0);
+			pci_pme_active(tp->pdev, true);
 
 			/* Also, force SERR#/PERR# in PCI command. */
 			pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd);
-- 
1.8.3.2

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