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Date: Thu, 27 Feb 2014 20:32:42 -0800
From: Aaron Brown <aaron.f.brown@...el.com>
To: davem@...emloft.net
Cc: Don Skidmore <donald.c.skidmore@...el.com>, netdev@...r.kernel.org,
gospo@...hat.com, sassmann@...hat.com,
Aaron Brown <aaron.f.brown@...el.com>
Subject: [net-next 3/6] ixgbe: fix bit toggled for 82599 reset fix.
From: Don Skidmore <donald.c.skidmore@...el.com>
The current code doesn't toggle the correct bit to reset the data pipeline
on Restart_AN assertion. This patch corrects that.
Signed-off-by: Don Skidmore <donald.c.skidmore@...el.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@...el.com>
Signed-off-by: Aaron Brown <aaron.f.brown@...el.com>
---
drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
index 1c31d2d..e919c28 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
@@ -2395,7 +2395,8 @@ static s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw)
autoc_reg |= IXGBE_AUTOC_AN_RESTART;
/* Write AUTOC register with toggled LMS[2] bit and Restart_AN */
- IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg ^ IXGBE_AUTOC_LMS_1G_AN);
+ IXGBE_WRITE_REG(hw, IXGBE_AUTOC,
+ autoc_reg ^ (0x4 << IXGBE_AUTOC_LMS_SHIFT));
/* Wait for AN to leave state 0 */
for (i = 0; i < 10; i++) {
--
1.8.5.GIT
--
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