netdev - RE: [PATCH RFC 3/3] Altera TSE: Add Altera Triple Speed Ethernet (TSE) Driver

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Message-ID: <063D6719AE5E284EB5DD2968C1650D6D0F6CFE20@AcuExch.aculab.com>
Date:	Tue, 4 Mar 2014 10:06:13 +0000
From:	David Laight <David.Laight@...LAB.COM>
To:	'Vince Bridgers' <vbridgers2013@...il.com>,
	Florian Fainelli <f.fainelli@...il.com>
CC:	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	"robh+dt@...nel.org" <robh+dt@...nel.org>,
	"pawel.moll@....com" <pawel.moll@....com>,
	"mark.rutland@....com" <mark.rutland@....com>,
	"ijc+devicetree@...lion.org.uk" <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Rob Landley <rob@...dley.net>
Subject: RE: [PATCH RFC 3/3] Altera TSE: Add Altera Triple Speed Ethernet
 (TSE) Driver

From: Of Vince Bridgers
> Hello Florian, thank you for taking the time to comments. My responses inline.
> 
> On Sun, Mar 2, 2014 at 6:59 PM, Florian Fainelli <f.fainelli@...il.com> wrote:
> > Hello Vince,
> >
> > It might help reviewing the patches by breaking the patches into:
> >
> > - the SGDMA bits
> > - the MSGDMA bits
> > - the Ethernet MAC driver per-se
> 
> I'll break down the next submission.
> 
> >
> > BTW, it does look like the SGDMA code could/should be a dmaengine driver?
> 
> I did consider this, but after studying the dmaengine api I found the
> API definitions and semantics were not a match to the way the SGDMA
> and MSGDMA behave collectively. Moreover, I could not find an example
> of an Ethernet driver that made use of the dmaengine API - only the
> Micrel driver seems to use it. When studying what components actually
> used the dmaengine API I concluded the dmaengine API was defined for
> use cases different than Ethernet.

It is probably reasonable to expect that the SGDMA is instantiated for the
sole use of the ethernet block - it probably wants two of them, and then
treat it as part of the ethernet hardware.
I've not looked at the TSE or SGDMA, but I suspect you could require that
they be placed at adjacent Avalon addresses. So that they are effectively
a single device. Qsys might even let you define such a beast.

	David



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