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Message-ID: <CAD6G_RQ=Zomytu+CAd0Os1ZZokJQiju-LvpABHdRRaQGSVC7FQ@mail.gmail.com>
Date: Thu, 6 Mar 2014 01:32:54 +0530
From: Jagan Teki <jagannadh.teki@...il.com>
To: Michael Chan <mchan@...adcom.com>
Cc: netdev@...r.kernel.org,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
Nithin Nayak Sujir <nsujir@...adcom.com>,
Grant Likely <grant.likely@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>
Subject: Re: sblk->status_tag on drivers/net/ethernet/broadcom/tg3.c
On Wed, Mar 5, 2014 at 12:20 PM, Michael Chan <mchan@...adcom.com> wrote:
> On Wed, 2014-03-05 at 11:43 +0530, Jagan Teki wrote:
>> As per your point I've a question here like - the status block is not properly
>> updated (DMA'ed), does this depends on the address range we are advertised
>> on PCIe ranges filed to make sure to use EP-
>> http://devicetree.org/Device_Tree_Usage#PCI_Host_Bridge
>
> The status block is in host memory (CPU memory). This memory is
> allocated by the driver. The DMA address of the status block is then
> programmed into the NIC register HOSTCC_STATUS_BLK_HOST_ADDR so that the
> NIC knows where to DMA the status block. When there is an event, the
> NIC DMAs a new status block and then generates IRQ.
>
> The status block is not in PCI memory. PCI memory is where the
> registers are mapped. Hope this helps.
Thanks this really help my understanding.
BTW: I got all 0's on tnapi->hw_status, looks like host memory contents were
violated or not-been updated properly I guess.
thanks!
--
Jagan.
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