netdev - Re: [PATCH 4/6] drivers: net: cpsw: Enable Annexe F Time sync

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Message-ID: <20140428075530.GA8371@netboy>
Date:	Mon, 28 Apr 2014 09:55:31 +0200
From:	Richard Cochran <richardcochran@...il.com>
To:	George Cherian <george.cherian@...com>
Cc:	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
	linux-omap@...r.kernel.org, davem@...emloft.net,
	jeffrey.t.kirsher@...el.com, dborkman@...hat.com, ast@...mgrid.com,
	tklauser@...tanz.ch, mpa@...gutronix.de, bhutchings@...arflare.com,
	zonque@...il.com, balbi@...com, mugunthanvnm@...com,
	t-kristo@...com, mturquette@...aro.org, linux@....linux.org.uk,
	galak@...eaurora.org, ijc+devicetree@...lion.org.uk,
	mark.rutland@....com, pawel.moll@....com, robh+dt@...nel.org,
	tony@...mide.com, bcousson@...libre.com
Subject: Re: [PATCH 4/6] drivers: net: cpsw: Enable Annexe F Time sync

On Mon, Apr 28, 2014 at 09:40:23AM +0530, George Cherian wrote:
> Enable the Annex F Time Sync explicitly for DRA7x and AM4372.
> With this enabled the L2 PTP is working.

L2 works fine without this bit. If this is needed for V3 hardware,
then it should have its own code variant.
 
> while at that rename TS_BIT8 to TS_TTL_NONZERO

Is this bit finally documented for am335x?

Thanks,
Richard

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