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Date:	Mon, 02 Jun 2014 23:33:47 +0400
From:	Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:	David Miller <davem@...emloft.net>, ben.dooks@...ethink.co.uk
CC:	linux-kernel@...ethink.co.uk, netdev@...r.kernel.org,
	nobuhiro.iwamatsu.yj@...esas.com, magnus.damn@...nsource.se,
	horms@...ge.net.au, yoshihiro.shimoda.uh@...esas.com,
	cm-hiep@...so.co.jp
Subject: Re: [PATCH v2] sh_eth: use RNC mode for R8A7790/R87791

Hello.

On 06/02/2014 10:53 PM, David Miller wrote:

>> The current behaviour of the sh_eth driver is not to use the RNC bit
>> for the receive ring. This means that every packet recieved is not only
>> generating an IRQ but it also stops the receive ring DMA as well until
>> the driver re-enables it after unloading the packet.

>> This means that a number of the following errors are generated due to
>> the receive packet FIFO overflowing due to nowhere to put packets:

>> 	net eth0: Receive FIFO Overflow

>> I have tested the RMCR_RNC configuration with NFS root filesystem and
>> the driver has not failed yet.  There are further test reports from
>> Sergei Shtylov and others for both the R8A7790 and R8A7791.

>> There is also feedback fron Cao Minh Hiep[1] which reports the
>> same issue in (http://comments.gmane.org/gmane.linux.network/316285)
>> showing this fixes issues with losing UDP datagrams under iperf.

>> Tested-by: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
>> Signed-off-by: Ben Dooks <ben.dooks@...ethink.co.uk>

> Given the description, I can't fathom a reason why this wouldn't be
> set always, for every chip.

> Do some chips not implement this bit at all?

    Looks like the early SH2/3 SoCs didn't implement the whole register.
Despite that, sh_eth_dev_init() always writes to this register... :-/
So far, the RMCR.RNC bit was mostly set for the Gigabit-capable controllers, 
however that rule wasn't strictly followed. Well, this driver is still a mess, 
and it's hard to deal with it without the necessary documentation.

WBR, Sergei

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