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Message-ID: <538D36AF.6050303@renesas.com>
Date: Tue, 3 Jun 2014 11:45:03 +0900
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
To: David Miller <davem@...emloft.net>
CC: "sergei.shtylyov@...entembedded.com"
<sergei.shtylyov@...entembedded.com>,
"ben.dooks@...ethink.co.uk" <ben.dooks@...ethink.co.uk>,
"linux-kernel@...ethink.co.uk" <linux-kernel@...ethink.co.uk>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@...esas.com>,
"magnus.damn@...nsource.se" <magnus.damn@...nsource.se>,
"horms@...ge.net.au" <horms@...ge.net.au>,
"cm-hiep@...so.co.jp" <cm-hiep@...so.co.jp>
Subject: Re: [PATCH v2] sh_eth: use RNC mode for R8A7790/R87791
Hi David,
(2014/06/03 5:49), David Miller wrote:
> From: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
> Date: Mon, 02 Jun 2014 23:33:47 +0400
>
>> Looks like the early SH2/3 SoCs didn't implement the whole register.
>> Despite that, sh_eth_dev_init() always writes to this register... :-/
>> So far, the RMCR.RNC bit was mostly set for the Gigabit-capable
>> controllers, however that rule wasn't strictly followed. Well, this
>> driver is still a mess, and it's hard to deal with it without the
>> necessary documentation.
>
> Why don't we therefore:
>
> 1) Skip the register write if the per-chip value is zero.
>
> 2) Add the RNC bit to all of the gigabit capable controllers.
>
Thank you for the suggestion.
I checked all of datasheets about the following LSIs.
- sh7619, sh7710, sh7724, sh7734, sh7757(ether, gther),
sh7763, r7s72100, r8a7740, r8a7778, r8a7790, r8a7791
(There are in the "static struct platform_device_id sh_eth_id_table[]".)
And then, I found all of these LSIs have the "RNC" bit in the register.
Accurately some LSIs have a difference bit name like "RNR" or "RR". (I don't know why...)
However, the behavior of the bit is the same as all of these LSIs.
So, I think we are able to:
- add the RNC bit to all of the ethernet controllers.
- remove ".rmcr_value" in the "struct sh_eth_cpu_data".
Best regargds,
Yoshihiro Shimoda
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