netdev - Re: [net-next 01/13] i40e: add checks for AQ error status bits

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Message-ID: <5395B4C1.7070004@cogentembedded.com>
Date:	Mon, 09 Jun 2014 17:21:05 +0400
From:	Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:	davem@...emloft.net, Shannon Nelson <shannon.nelson@...el.com>
CC:	Jeff Kirsher <jeffrey.t.kirsher@...el.com>, netdev@...r.kernel.org,
	gospo@...hat.com, sassmann@...hat.com
Subject: Re: [net-next 01/13] i40e: add checks for AQ error status bits

Hello.

On 06/09/2014 12:49 PM, Jeff Kirsher wrote:

> From: Shannon Nelson <shannon.nelson@...el.com>

> Check for error status bits on the AdminQ event queue and announce them
> if seen.  If the Firmware sets these bits, it will trigger an AdminQ
> interrupt to get the driver's attention to process the ARQ, which will
> likely be enough to clear the actual issue.

> Signed-off-by: Shannon Nelson <shannon.nelson@...el.com>
> Change-ID: I009e0ebc8be764e40e193b29aed2863f43eb5cb0
> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@...el.com>
> ---
>   drivers/net/ethernet/intel/i40e/i40e_main.c | 36 +++++++++++++++++++++++++++++
>   1 file changed, 36 insertions(+)

> diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
> index 8c16e18..ab0b6e1 100644
> --- a/drivers/net/ethernet/intel/i40e/i40e_main.c
> +++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
> @@ -5132,11 +5132,47 @@ static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
>   	u16 pending, i = 0;
>   	i40e_status ret;
>   	u16 opcode;
> +	u32 oldval;
>   	u32 val;
>
>   	if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state))
>   		return;
>
> +	/* check for error indications */
> +	val = rd32(&pf->hw, pf->hw.aq.arq.len);
> +	oldval = val;
> +	if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
> +		dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");

    Hm, why not dev_err() here and below?

> +		val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
> +	}
> +	if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
> +		dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
> +		val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
> +	}
> +	if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
> +		dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
> +		val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
> +	}
> +	if (oldval != val)
> +		wr32(&pf->hw, pf->hw.aq.arq.len, val);
> +
> +	val = rd32(&pf->hw, pf->hw.aq.asq.len);
> +	oldval = val;
> +	if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
> +		dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
> +		val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
> +	}
> +	if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
> +		dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
> +		val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
> +	}
> +	if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
> +		dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
> +		val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
> +	}
> +	if (oldval != val)
> +		wr32(&pf->hw, pf->hw.aq.asq.len, val);
> +

WBR, Sergei

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