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Message-ID: <1403516340-22997-17-git-send-email-markos.chandras@imgtec.com>
Date: Mon, 23 Jun 2014 10:38:59 +0100
From: Markos Chandras <markos.chandras@...tec.com>
To: <linux-mips@...ux-mips.org>
CC: Markos Chandras <markos.chandras@...tec.com>,
"David S. Miller" <davem@...emloft.net>,
Daniel Borkmann <dborkman@...hat.com>,
"Alexei Starovoitov" <ast@...mgrid.com>, <netdev@...r.kernel.org>
Subject: [PATCH 16/17] MIPS: bpf: Use 32 or 64-bit load instruction to load an address to register
When loading a pointer to a register we need to use the appropriate
32 or 64bit instruction to preserve the pointer's top 32bits.
Cc: "David S. Miller" <davem@...emloft.net>
Cc: Daniel Borkmann <dborkman@...hat.com>
Cc: Alexei Starovoitov <ast@...mgrid.com>
Cc: netdev@...r.kernel.org
Signed-off-by: Markos Chandras <markos.chandras@...tec.com>
---
arch/mips/net/bpf_jit.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/mips/net/bpf_jit.c b/arch/mips/net/bpf_jit.c
index 4920e0fd05ee..d8dba7b523a5 100644
--- a/arch/mips/net/bpf_jit.c
+++ b/arch/mips/net/bpf_jit.c
@@ -447,6 +447,17 @@ static inline void emit_wsbh(unsigned int dst, unsigned int src,
emit_instr(ctx, wsbh, dst, src);
}
+/* load address to register */
+static inline void emit_load_addr(unsigned int dst, unsigned int src,
+ int imm, struct jit_ctx *ctx)
+{
+ /* src contains the base addr of the 32/64-pointer */
+ if (config_enabled(CONFIG_64BIT))
+ emit_instr(ctx, ld, dst, imm, src);
+ else
+ emit_instr(ctx, lw, dst, imm, src);
+}
+
/* load a function pointer to register */
static inline void emit_load_func(unsigned int reg, ptr imm,
struct jit_ctx *ctx)
@@ -1271,7 +1282,8 @@ jmp_cmp:
/* A = skb->dev->ifindex */
ctx->flags |= SEEN_SKB | SEEN_A | SEEN_S0;
off = offsetof(struct sk_buff, dev);
- emit_load(r_s0, r_skb, off, ctx);
+ /* Load address of *dev member */
+ emit_load_addr(r_s0, r_skb, off, ctx);
/* error (0) in the delay slot */
emit_bcond(MIPS_COND_EQ, r_s0, r_zero,
b_imm(prog->len, ctx), ctx);
--
2.0.0
--
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