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Message-Id: <20140806.134733.1403352639265928198.davem@davemloft.net>
Date:	Wed, 06 Aug 2014 13:47:33 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	hariprasad@...lsio.com
Cc:	netdev@...r.kernel.org, leedom@...lsio.com, nirranjan@...lsio.com,
	kumaras@...lsio.com, anish@...lsio.com
Subject: Re: [PATCHv2 net-next] cxgb4: Fix for SR-IOV VF initialization

From: Hariprasad Shenai <hariprasad@...lsio.com>
Date: Wed,  6 Aug 2014 17:10:59 +0530

> Commit 35b1de5 ("rdma/cxgb4: Fixes cxgb4 probe failure in VM when PF is exposed
> through PCI Passthrough") introduced a regression, where VF failed to
> initialize for Physical function 0 to Physical Function 3. In the above
> commit, we removed the code which used to enable sriov for PF0 to PF3. Now
> adding it back to get sriov working.
> 
> V2:
>  Removed SRIOV loop for PF[0..3] to instantiate the VF's as per David Miller's
>  comment
> 
> Signed-off-by: Hariprasad Shenai <hariprasad@...lsio.com>

Applied, thanks.
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