netdev - [PATCH 2/3] defxx: DEFEA's Burst Holdoff register initialization fix

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Message-ID: <alpine.LFD.2.11.1409251031170.6148@eddie.linux-mips.org>
Date:	Thu, 25 Sep 2014 11:06:45 +0100 (BST)
From:	"Maciej W. Rozycki" <macro@...ux-mips.org>
To:	netdev@...r.kernel.org
Subject: [PATCH 2/3] defxx: DEFEA's Burst Holdoff register initialization
 fix

Use the mask rather than bit number macro to initialize the chip select 
control bit for PDQ register space decoding in the Burst Holdoff register.

Signed-off-by: Maciej W. Rozycki <macro@...ux-mips.org>
---
 Another brown paperbag.  Dave, please apply.

  Maciej

linux-defea-burst-holdoff.patch
Index: linux-20140924-dolch/drivers/net/fddi/defxx.c
===================================================================
--- linux-20140924-dolch.orig/drivers/net/fddi/defxx.c
+++ linux-20140924-dolch/drivers/net/fddi/defxx.c
@@ -748,9 +748,9 @@ static void dfx_bus_init(struct net_devi
 		 */
 		val = inb(base_addr + PI_DEFEA_K_BURST_HOLDOFF);
 		if (dfx_use_mmio)
-			val |= PI_BURST_HOLDOFF_V_MEM_MAP;
+			val |= PI_BURST_HOLDOFF_M_MEM_MAP;
 		else
-			val &= ~PI_BURST_HOLDOFF_V_MEM_MAP;
+			val &= ~PI_BURST_HOLDOFF_M_MEM_MAP;
 		outb(val, base_addr + PI_DEFEA_K_BURST_HOLDOFF);
 
 		/* Enable interrupts at EISA bus interface chip (ESIC) */
--
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