netdev - Re: [PATCH v2 2/3] net: can: c_can: Add syscon/regmap RAMINIT mechanism

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Message-ID: <20141001104317.GB1261@katana>
Date:	Wed, 1 Oct 2014 12:43:18 +0200
From:	Wolfram Sang <wsa@...-dreams.de>
To:	Marc Kleine-Budde <mkl@...gutronix.de>
Cc:	Roger Quadros <rogerq@...com>, wg@...ndegger.com, tony@...mide.com,
	tglx@...utronix.de, mugunthanvnm@...com, george.cherian@...com,
	balbi@...com, nsekhar@...com, nm@...com,
	sergei.shtylyov@...entembedded.com, linux-omap@...r.kernel.org,
	linux-can@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [PATCH v2 2/3] net: can: c_can: Add syscon/regmap RAMINIT
 mechanism


> > Unfortunately it is 5 ;)
> > We have display IP related bit in between 3 and 5 :P
> 
> What on earth were the HW engineers thinking????????????

"Let's test my RNG on the bit-placement of this register" :)

> ...if we just have the instance parameter in the syscon phandle, we have
> to put the mapping into the driver, which makes IMHO no sense, because
> you have to touch the driver, if there is another SoC with the DCAN core.

... which would be my preferred solution. I think new SoCs should have
some kind of:

	compatible = "commodore,c64ultra", "bosch,d_can";

in the DT anyhow to allow for SoC specific quirks/adjustments. And
custom raminit belongs to that IMO (see the ti routine getting more and
more specific).


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