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Message-ID: <5434F989.2040101@dev.mellanox.co.il>
Date: Wed, 08 Oct 2014 11:44:57 +0300
From: Moshe Lazer <moshel@....mellanox.co.il>
To: davem@...emloft.net
CC: Or Gerlitz <ogerlitz@...lanox.com>,
Jack Morgenstein <jackm@....mellanox.co.il>,
Tal Alon <talal@...lanox.com>,
Yevgeny Petrilin <yevgenyp@...lanox.com>,
netdev@...r.kernel.org, Amir Vadai <amirv@...lanox.com>
Subject: Re: FW: [PATCH V1 net-next 1/2] pgtable: Add API to query if write
combining is available
> From: David Miller [mailto:davem@...emloft.net]
> Sent: Tuesday, October 07, 2014 10:44 PM
> To: Or Gerlitz
> Cc: netdev@...r.kernel.org; Amir Vadai; jackm@....mellanox.co.il; Moshe Lazer; Tal Alon; Yevgeny Petrilin
> Subject: Re: [PATCH V1 net-next 1/2] pgtable: Add API to query if write combining is available
>
> From: Or Gerlitz <ogerlitz@...lanox.com>
> Date: Sun, 5 Oct 2014 11:22:21 +0300
>
>> From: Moshe Lazer <moshel@...lanox.com>
>>
>> Currently the kernel write-combining interface provides a best effort
>> mechanism in which the caller simply invokes pgprot_writecombine().
>>
>> If write combining is available, the region is mapped for it,
>> otherwise the region is (silently) mapped as non-cached.
>>
>> In some cases, however, the calling driver must know if write
>> combining is available, so a silent best effort mechanism is not sufficient.
>>
>> Add writecombine_available(), which returns true if the system
>> supports write combining and false if it doesn't.
>>
>> Signed-off-by: Moshe Lazer <moshel@...lanox.com>
>> Signed-off-by: Jack Morgenstein <jackm@....mellanox.co.il>
>> Signed-off-by: Or Gerlitz <ogerlitz@...lanox.com>
> This needs some ACKs from MM developers.
>
> But also the situation is more complicated than a simple boolean test.
>
> On some platforms you have to test first whether the range you are trying to write combine can legally be marked in that way. The DRM layer has all of these per-arch tests to do this properly.
>
> #if defined(__i386__) || defined(__x86_64__)
> if (map->type == _DRM_REGISTERS && !(map->flags & _DRM_WRITE_COMBINING))
> tmp = pgprot_noncached(tmp);
> else
> tmp = pgprot_writecombine(tmp);
> #elif defined(__powerpc__)
> pgprot_val(tmp) |= _PAGE_NO_CACHE;
> if (map->type == _DRM_REGISTERS)
> pgprot_val(tmp) |= _PAGE_GUARDED;
> #elif defined(__ia64__)
> if (efi_range_is_wc(vma->vm_start, vma->vm_end -
> vma->vm_start))
> tmp = pgprot_writecombine(tmp);
> else
> tmp = pgprot_noncached(tmp);
> #elif defined(__sparc__) || defined(__arm__) || defined(__mips__)
> tmp = pgprot_noncached(tmp);
> #endif
The idea was to provide an indication as for whether the arch supports
write-combining in general.
If we want to benefit from blue flame operations, we need to map the
blue flame registers as write combining - otherwise there is no benefit.
So we would like to know if write combining is supported by the system
or not.
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