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Message-ID: <1412918130-18830-1-git-send-email-b45643@freescale.com>
Date:	Fri, 10 Oct 2014 13:15:27 +0800
From:	Luwei Zhou <b45643@...escale.com>
To:	<davem@...emloft.net>, <richardcochran@...il.com>
CC:	<netdev@...r.kernel.org>, <shawn.guo@...aro.org>,
	<bhutchings@...arflare.com>, <R49496@...escale.com>,
	<b38611@...escale.com>, <b20596@...escale.com>,
	<stephen@...workplumber.org>
Subject: [PATCH v3 0/3] Enable FEC pps feather

Change from v2 to v3:
	-Using the default channel 0 to be PPS channel not PTP_PIN_SET/GETFUNC interface.
	-Using the linux definition of NSEC_PER_SEC.

Change from v1 to v2:
	- Fix the potential 32-bit multiplication overflow issue.
	- Optimize the hareware adjustment code to improve efficiency as Richard suggested
	- Use ptp PTP_PIN_SET/GETFUNC interface to set PPS channel not device tree
	and add PTP_PF_PPS enumeration
	- Modify comments style


Luwei Zhou (3):
  net: fec: ptp: Use the 31-bit ptp timer.
  net: fec: ptp: Use hardware algorithm to adjust PTP counter.
  net: fec: ptp: Enable PPS output based on ptp clock

 drivers/net/ethernet/freescale/fec.h      |  10 ++
 drivers/net/ethernet/freescale/fec_main.c |   2 +
 drivers/net/ethernet/freescale/fec_ptp.c  | 272 ++++++++++++++++++++++++++++--
 3 files changed, 267 insertions(+), 17 deletions(-)

-- 
1.9.1

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