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Message-ID: <1414656349.2396.70.camel@linux.intel.com>
Date:	Thu, 30 Oct 2014 10:05:49 +0200
From:	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:	Giuseppe CAVALLARO <peppe.cavallaro@...com>
Cc:	Sergei Shtylyov <sergei.shtylyov@...entembedded.com>,
	netdev@...r.kernel.org,
	Kweh Hock Leong <hock.leong.kweh@...el.com>,
	"David S. Miller" <davem@...emloft.net>,
	Vince Bridgers <vbridgers2013@...il.com>,
	Rayagond K <rayagond@...avyalabs.com>
Subject: Re: [PATCH 2/5] stmmac: pci: use managed resources

On Mon, 2014-10-27 at 16:28 +0100, Giuseppe CAVALLARO wrote:
> On 10/22/2014 10:36 AM, Andy Shevchenko wrote:
> > So, I was trying to find any specification on public regarding to boards
> > that have this IP, no luck so far. I guess that that code was created
> > due to XILINX FPGA usage which probably can provide any BAR user wants
> > to. Thus, I imply that in real applications the BAR most probably will
> > be 0. However, I left variable which can be overridden in future
> > (regarding to PCI ID).
> >
> > It would be nice to hear someone from ST about this. Giuseppe?
> 
> Hello Andy
> 
> this chip is on ST SoCs since long time but embedded. I have no PCI
> card. Added Rayagond on copy too

Rayagond, what do you think about changing an approach that is used to
get resources from PCI?

-- 
Andy Shevchenko <andriy.shevchenko@...el.com>
Intel Finland Oy

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