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Message-ID: <CAJ3bTp79FLhOCvvQNG=+C17v5TOzy2ZvbyC24OQWTr2mmJ4OCw@mail.gmail.com>
Date: Wed, 12 Nov 2014 10:44:00 +0530
From: Rayagond Kokatanur <rayagond@...avyalabs.com>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: Giuseppe CAVALLARO <peppe.cavallaro@...com>,
Sergei Shtylyov <sergei.shtylyov@...entembedded.com>,
netdev <netdev@...r.kernel.org>,
Kweh Hock Leong <hock.leong.kweh@...el.com>,
"David S. Miller" <davem@...emloft.net>,
Vince Bridgers <vbridgers2013@...il.com>
Subject: Re: [PATCH 2/5] stmmac: pci: use managed resources
Hi Andy,
Yes, I tested this pci driver on XILINX FPGA setup and its true that
we can man any bar number by changing the configuration in bit-map.
But its always good to keep that for loop which try to map any bar
number between 0 - 5, the new code breaks if bar number is other than
zero.
We can make driver generic by keeping that loop.
wwr
Rayagond
On Thu, Oct 30, 2014 at 1:35 PM, Andy Shevchenko
<andriy.shevchenko@...ux.intel.com> wrote:
> On Mon, 2014-10-27 at 16:28 +0100, Giuseppe CAVALLARO wrote:
>> On 10/22/2014 10:36 AM, Andy Shevchenko wrote:
>> > So, I was trying to find any specification on public regarding to boards
>> > that have this IP, no luck so far. I guess that that code was created
>> > due to XILINX FPGA usage which probably can provide any BAR user wants
>> > to. Thus, I imply that in real applications the BAR most probably will
>> > be 0. However, I left variable which can be overridden in future
>> > (regarding to PCI ID).
>> >
>> > It would be nice to hear someone from ST about this. Giuseppe?
>>
>> Hello Andy
>>
>> this chip is on ST SoCs since long time but embedded. I have no PCI
>> card. Added Rayagond on copy too
>
> Rayagond, what do you think about changing an approach that is used to
> get resources from PCI?
>
> --
> Andy Shevchenko <andriy.shevchenko@...el.com>
> Intel Finland Oy
>
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