[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1418750141.4248.3.camel@LTIRV-MCHAN1.corp.ad.broadcom.com>
Date: Tue, 16 Dec 2014 09:15:41 -0800
From: Michael Chan <mchan@...adcom.com>
To: Bjorn Helgaas <bhelgaas@...gle.com>
CC: Rajat Jain <rajatxjain@...il.com>,
Marcelo Ricardo Leitner <marcelo.leitner@...il.com>,
Nils Holland <nholland@...ys.org>,
David Miller <davem@...emloft.net>,
netdev <netdev@...r.kernel.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
Rafael Wysocki <rjw@...ysocki.net>,
Prashant Sreedharan <prashant@...adcom.com>
Subject: Re: [bisected] tg3 broken in 3.18.0?
On Tue, 2014-12-16 at 09:20 -0700, Bjorn Helgaas wrote:
> I think we're in this path:
>
> tg3_init_hw
> tg3_reset_hw
> tg3_disable_ints
> tg3_stop_fw
> tg3_write_sig_pre_reset
> tg3_chip_reset
> pci_device_is_present
> pci_bus_read_dev_vendor_id
>
> and in this case pci_device_is_present() also passes a timeout of zero
> to pci_bus_read_dev_vendor_id(). My guess is that tg3 is resetting
> the device, so it's not too surprising that the config read returns
> CRS status immediately afterward.
>
At the point of calling pci_device_is_present(), chip reset hasn't
started yet, so there should be no problem reading config space.
In all the newer tg3 chips, chip reset does not reset the PCIE block.
So I think config space should always be accesible even during reset.
>
--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Powered by blists - more mailing lists