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Message-Id: <20150207.224545.2294450094908030704.davem@davemloft.net>
Date:	Sat, 07 Feb 2015 22:45:45 -0800 (PST)
From:	David Miller <davem@...emloft.net>
To:	thomas.lendacky@....com
Cc:	netdev@...r.kernel.org
Subject: Re: [PATCH net] amd-xgbe: Check per channel DMA interrupt use in
 main ISR

From: Tom Lendacky <thomas.lendacky@....com>
Date: Thu, 5 Feb 2015 19:17:14 -0600

> When using per channel DMA interrupts the transmit interrupt (TI) and the
> receive interrupt (RI) are masked off so as to not generate an interrupt
> to the main ISR. However, should another interrupt fire for the DMA channel
> that is handled by the main ISR the TI/RI bits can still be set. This
> will cause the wrong and uninitialized napi structure to be used causing a
> panic. Add a check to be sure per channel DMA interrupts are not enabled
> before acting on those bit flags.
> 
> Signed-off-by: Tom Lendacky <thomas.lendacky@....com>

Applied.
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