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Message-ID: <5526CD84.9090402@free.fr>
Date: Thu, 09 Apr 2015 21:05:40 +0200
From: Mason <slash.tmp@...e.fr>
To: Daniel Mack <daniel@...que.org>, netdev@...r.kernel.org
CC: Florian Fainelli <f.fainelli@...il.com>,
Mugunthan <mugunthanvnm@...com>,
"David S. Miller" <davem@...emloft.net>,
Matus Ujhelyi <ujhelyi.m@...il.com>
Subject: Re: Atheros 8035 PHY only works when at803x_config_init() is
commented out
Daniel Mack wrote:
> Mason wrote:
>
>> Here is the data sheet for the AR8035:
>> http://www.redeszone.net/app/uploads/2014/04/AR8035.pdf
>>
>> It seems the problem comes from the fact that the PHY treats
>> HW reset and SW reset differently:
>>
>> HW reset: registers are set to specific values
>> SW reset: some bits are retained across reset
>>
>> Case in point: the control register (BMCR)
>> HW reset: BMCR = 0x3100
>> SW reset: retain bits[6,8,12,13] / other bits = 0
>>
>> (0x3100 means bit_6=0, bit_8=bit_12=bit_13=1)
>>
>> When we execute this line from genphy_soft_reset()
>>
>> phy_write(phydev, MII_BMCR, BMCR_RESET);
>>
>> we reset the bits in BMCR, and SW reset does not restore them.
>>
>> It seems to me (please tell me if I am wrong) that it should
>> be safe for all PHYs to write old_val | BMCR_RESET, instead of
>> just BMCR_RESET. Thus...
>>
>> On chips that REALLY reset, the old_val bits will be discarded;
>> while on chips that retain some bits, we do want to keep them.
>>
>> So the patch would go something like below. What do you think?
>
> I don't think that'll work, because writing a 1 into the RESET bit of
> the register causes the PHY to enter its software reset routine
> immediately. The other bits should hence be reset to their defaults,
> regardless of what you set them to at the same time.
I forgot to ask:
(I presume you have a system with an AR8035.)
When the PHY is reset, you don't see the odd behavior I get?
Can you print the value of BMCR, before and after
phy_write(phydev, MII_BMCR, BMCR_RESET);
Regards.
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