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Message-ID: <1430247712.26841.18.camel@prashant>
Date: Tue, 28 Apr 2015 12:01:52 -0700
From: Prashant Sreedharan <prashant@...adcom.com>
To: Michael Chan <mchan@...adcom.com>
CC: Toan Pham <tpham3783@...il.com>, <sanjeevb@...adcom.com>,
<netdev@...r.kernel.org>
Subject: Re: [Problem] broadcom tg3 network driver disconnects under high
load
On Tue, 2015-04-28 at 11:11 -0700, Michael Chan wrote:
> On Mon, 2015-04-27 at 22:10 +0000, Toan Pham wrote:
> > Michael,
> >
> >
> > Please see attach files.
> >
> > BTW, I have also tested this bug on at least 8 different HP 705 PCs
> > with the 5762 NIC, so it is probably not a manufacturer defect. In
> > addition, I can never replicate the same issue on the older chipset,
> > BCM5761, which can be found on the HP model 6005. I hope this
> > information is helpful. Thanks
>
> Thanks for the data. The memory enable bit is cleared and there are
> some correctable error bits set. My colleague Sanjeev will look into
> this.
>
> Do you have PCIE Advanced Error Reporting (CONFIG_PCIEAER) enabled in
> your kernel?
>
5762 NIC has a bug due to which the chip would detect false 4G boundary
crossing and it would stall the chip. With the data you have provided it
is not clear whether we are hitting this problem or not. Register 0x4c04
bit 5 would be set when this condition occurs. But since the memory
enable bit is clear the register dump collected before the chip was
reset is having all garbage in it.
We were able to reproduce this issue internally only with iommu enabled.
In your dmesg logs I do not see iommu enabled. So unless we have a pcie
trace we cannot confirm if this HW bug is indeed the problem you are
seeing.
Meanwhile can you try the attached patch and see if you are able to
reproduce the problem ? This patch will restrict all DMA address given
to the chip to 31 bits.
Toan, thanks for bringing this to our notice, also please cc maintainers
so that mails are not missed.
View attachment "Restrict-DMA-address-to-31-bits-for-5762-device.patch" of type "text/x-patch" (1381 bytes)
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