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Message-ID: <CABg9mctTj2M7Mw+bPgkDYtorW21uTuLxWnxLFucWPtM4TQ-7VA@mail.gmail.com>
Date:	Thu, 12 Nov 2015 19:28:12 -0800
From:	Z Lim <zlim.lnx@...il.com>
To:	Yang Shi <yang.shi@...aro.org>
Cc:	Alexei Starovoitov <ast@...nel.org>, daniel@...earbox.net,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will.deacon@....com>, Xi Wang <xi.wang@...il.com>,
	LKML <linux-kernel@...r.kernel.org>,
	Network Development <netdev@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	linaro-kernel@...ts.linaro.org
Subject: Re: [PATCH 2/2] arm64: bpf: make BPF prologue and epilogue align with
 ARM64 AAPCS

On Thu, Nov 12, 2015 at 1:57 PM, Yang Shi <yang.shi@...aro.org> wrote:
>
> Save and restore FP/LR in BPF prog prologue and epilogue, save SP to FP
> in prologue in order to get the correct stack backtrace.
>
> However, ARM64 JIT used FP (x29) as eBPF fp register, FP is subjected to
> change during function call so it may cause the BPF prog stack base address
> change too.
>
> Use x25 to replace FP as BPF stack base register (fp). Since x25 is callee
> saved register, so it will keep intact during function call.
> It is initialized in BPF prog prologue when BPF prog is started to run
> everytime. When BPF prog exits, it could be just tossed.
>
> So, the BPF stack layout looks like:
>
>                                  high
>          original A64_SP =>   0:+-----+ BPF prologue
>                                 |     | FP/LR and callee saved registers
>          BPF fp register => -64:+-----+
>                                 |     |
>                                 | ... | BPF prog stack
>                                 |     |
>                                 |     |
>          current A64_SP/FP =>   +-----+
>                                 |     |
>                                 | ... | Function call stack
>                                 |     |
>                                 +-----+
>                                   low
>

Yang, for stack unwinding to work, shouldn't it be something like the following?

          | LR |
A64_FP => | FP |
          | .. |
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