netdev - Re: [PATCH V3 2/2] arm64: bpf: make BPF prologue and epilogue align with ARM64 AAPCS

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Message-ID: <564A3329.1070504@linaro.org>
Date:	Mon, 16 Nov 2015 11:48:57 -0800
From:	"Shi, Yang" <yang.shi@...aro.org>
To:	Z Lim <zlim.lnx@...il.com>
CC:	Alexei Starovoitov <ast@...nel.org>,
	Daniel Borkmann <daniel@...earbox.net>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will.deacon@....com>, Xi Wang <xi.wang@...il.com>,
	LKML <linux-kernel@...r.kernel.org>,
	Network Development <netdev@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	linaro-kernel@...ts.linaro.org
Subject: Re: [PATCH V3 2/2] arm64: bpf: make BPF prologue and epilogue align
 with ARM64 AAPCS

On 11/13/2015 6:39 PM, Z Lim wrote:
> Yang, I noticed another thing...
>
> On Fri, Nov 13, 2015 at 10:09 AM, Yang Shi <yang.shi@...aro.org> wrote:
>> Save and restore FP/LR in BPF prog prologue and epilogue, save SP to FP
>> in prologue in order to get the correct stack backtrace.
>>
>> However, ARM64 JIT used FP (x29) as eBPF fp register, FP is subjected to
>> change during function call so it may cause the BPF prog stack base address
>> change too.
>>
>> Use x25 to replace FP as BPF stack base register (fp). Since x25 is callee
>> saved register, so it will keep intact during function call.
>
> Can you please add save/restore for x25 also? :)

Sure. BTW, since PUSH invokes stp instruction and SP need 16-bytes 
alignment, so we have to save x26 with x25 together. Anyway, it won't 
introduce any harm overhead since one instruction saves two registers.

Yang

>
>> It is initialized in BPF prog prologue when BPF prog is started to run
>> everytime. When BPF prog exits, it could be just tossed.
>>

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