netdev - Re: [PATCH V4 2/2] arm64: bpf: make BPF prologue and epilogue align with ARM64 AAPCS

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Message-Id: <20151117.144458.1305922349920062634.davem@davemloft.net>
Date:	Tue, 17 Nov 2015 14:44:58 -0500 (EST)
From:	David Miller <davem@...emloft.net>
To:	yang.shi@...aro.org
Cc:	ast@...nel.org, daniel@...earbox.net, catalin.marinas@....com,
	will.deacon@....com, zlim.lnx@...il.com, xi.wang@...il.com,
	linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linaro-kernel@...ts.linaro.org
Subject: Re: [PATCH V4 2/2] arm64: bpf: make BPF prologue and epilogue
 align with ARM64 AAPCS

From: Yang Shi <yang.shi@...aro.org>
Date: Mon, 16 Nov 2015 14:35:35 -0800

> Save and restore FP/LR in BPF prog prologue and epilogue, save SP to FP
> in prologue in order to get the correct stack backtrace.
> 
> However, ARM64 JIT used FP (x29) as eBPF fp register, FP is subjected to
> change during function call so it may cause the BPF prog stack base address
> change too.
> 
> Use x25 to replace FP as BPF stack base register (fp). Since x25 is callee
> saved register, so it will keep intact during function call.
> It is initialized in BPF prog prologue when BPF prog is started to run
> everytime. Save and restore x25/x26 in BPF prologue and epilogue to keep
> them intact for the outside of BPF. Actually, x26 is unnecessary, but SP
> requires 16 bytes alignment.
> 
> So, the BPF stack layout looks like:
 ...
> Signed-off-by: Yang Shi <yang.shi@...aro.org>

Applied, thank you.
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