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Date:	Sun, 22 Nov 2015 08:53:49 +0100
From:	Marcin Wojtas <mw@...ihalf.com>
To:	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	netdev@...r.kernel.org
Cc:	davem@...emloft.net, linux@....linux.org.uk,
	sebastian.hesselbarth@...il.com, andrew@...n.ch,
	jason@...edaemon.net, thomas.petazzoni@...e-electrons.com,
	gregory.clement@...e-electrons.com, simon.guinot@...uanux.org,
	nadavh@...vell.com, alior@...vell.com, xswang@...vell.com,
	myair@...vell.com, nitroshift@...oo.com, mw@...ihalf.com,
	jaz@...ihalf.com, tn@...ihalf.com, <stable@...r.kernel.org>
Subject: [PATCH 03/13] net: mvneta: fix bit assignment in MVNETA_RXQ_CONFIG_REG

MVNETA_RXQ_HW_BUF_ALLOC bit which controls enabling hardware buffer
allocation was mistakenly set as BIT(1). This commit fixes the assignment.

Signed-off-by: Marcin Wojtas <mw@...ihalf.com>
Cc: <stable@...r.kernel.org> # v3.8+
---
 drivers/net/ethernet/marvell/mvneta.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c
index 0f30aaa..d12b8c6 100644
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -36,7 +36,7 @@
 
 /* Registers */
 #define MVNETA_RXQ_CONFIG_REG(q)                (0x1400 + ((q) << 2))
-#define      MVNETA_RXQ_HW_BUF_ALLOC            BIT(1)
+#define      MVNETA_RXQ_HW_BUF_ALLOC            BIT(0)
 #define      MVNETA_RXQ_PKT_OFFSET_ALL_MASK     (0xf    << 8)
 #define      MVNETA_RXQ_PKT_OFFSET_MASK(offs)   ((offs) << 8)
 #define MVNETA_RXQ_THRESHOLD_REG(q)             (0x14c0 + ((q) << 2))
-- 
1.8.3.1

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