netdev - RE: [Intel-wired-lan] [next PATCH 02/11] ixgbe: Fix SR-IOV VLAN pool configuration

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Message-ID: <305E19FFAC908240AB6DEBD1E2D8C1E180CF6135@ORSMSX108.amr.corp.intel.com>
Date:	Thu, 10 Dec 2015 22:52:00 +0000
From:	"Schmitt, Phillip J" <phillip.j.schmitt@...el.com>
To:	Alexander Duyck <aduyck@...antis.com>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>
Subject: RE: [Intel-wired-lan] [next PATCH 02/11] ixgbe: Fix SR-IOV VLAN
 pool	configuration



> -----Original Message-----
> From: Intel-wired-lan [mailto:intel-wired-lan-bounces@...ts.osuosl.org] On
> Behalf Of Alexander Duyck
> Sent: Monday, November 02, 2015 5:10 PM
> To: netdev@...r.kernel.org; intel-wired-lan@...ts.osuosl.org
> Subject: [Intel-wired-lan] [next PATCH 02/11] ixgbe: Fix SR-IOV VLAN pool
> configuration
> 
> The code for checking the PF bit in ixgbe_set_vf_vlan_msg was using the wrong
> offset and as a result it was pulling the VLAN off of the PF even if there were VFs
> numbered greater than 40 that still had the VLAN enabled.
> 
> Signed-off-by: Alexander Duyck <aduyck@...antis.com>

Tested-by: Phil Schmitt <phillip.j.schmitt@...el.com>
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