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Message-ID: <305E19FFAC908240AB6DEBD1E2D8C1E180CF618F@ORSMSX108.amr.corp.intel.com>
Date: Thu, 10 Dec 2015 22:52:43 +0000
From: "Schmitt, Phillip J" <phillip.j.schmitt@...el.com>
To: Alexander Duyck <aduyck@...antis.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>
Subject: RE: [Intel-wired-lan] [next PATCH 05/11] ixgbe: Simplify
configuration of setting VLVF and VLVFB
> -----Original Message-----
> From: Intel-wired-lan [mailto:intel-wired-lan-bounces@...ts.osuosl.org] On
> Behalf Of Alexander Duyck
> Sent: Monday, November 02, 2015 5:10 PM
> To: netdev@...r.kernel.org; intel-wired-lan@...ts.osuosl.org
> Subject: [Intel-wired-lan] [next PATCH 05/11] ixgbe: Simplify configuration of
> setting VLVF and VLVFB
>
> This patch addresses several issues within the VLVF and VLVFB configuration
>
> First was the fact that code was overly complicated with multiple conditional
> paths depending on if we adding or removing and which bit we were going to
> add or remove. Instead of messing with all that I have simplified it by using (vid /
> 32) and (1 - vid / 32) to identify our register and the other vlvfb register.
>
> Second was the fact that we were likely leaking a few packets into the PF in
> cases where we were deleting an entry and the VFTA filter for that entry as the
> ordering was such that we deleted the pool and then the VLAN filter instead of
> the other way around. I have updated that by adding a check for no bits being
> set and if that occurs we clear things up in the proper order.
>
> Signed-off-by: Alexander Duyck <aduyck@...antis.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@...el.com>
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