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Message-ID: <CADhT+wesDDATNR1dX8ynjKKfm3tUv7_TSyZ80kCgGcr9gYcfBg@mail.gmail.com>
Date: Mon, 14 Dec 2015 15:16:10 -0600
From: Dinh Nguyen <dinh.linux@...il.com>
To: Phil Reid <preid@...ctromag.com.au>
Cc: Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
David Miller <davem@...emloft.net>,
"vbridger@...nsource.altera.com" <vbridger@...nsource.altera.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
netdev@...r.kernel.org
Subject: Re: [PATCH v6 4/4] stmmac: socfpga: Provide dt node to config ptp clk source.
On Sun, Dec 13, 2015 at 9:32 PM, Phil Reid <preid@...ctromag.com.au> wrote:
> Provides an options to use the ptp clock routed from the Altera FPGA
> fabric. Instead of the defalt eosc1 clock connected to the ARM HPS core.
> This setting affects all emacs in the core as the ptp clock is common.
>
> Acked-by: Rob Herring <robh@...nel.org>
> Signed-off-by: Phil Reid <preid@...ctromag.com.au>
> ---
> Documentation/devicetree/bindings/net/socfpga-dwmac.txt | 2 ++
> drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 9 +++++++++
> 2 files changed, 11 insertions(+)
>
Acked-by: Dinh Nguyen <dinguyen@...nsource.altera.com>
Dinh
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