netdev - RE: Optimizing instruction-cache, more packets at each stage

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Message-ID: <063D6719AE5E284EB5DD2968C1650D6D1CCC6613@AcuExch.aculab.com>
Date:	Fri, 15 Jan 2016 13:36:04 +0000
From:	David Laight <David.Laight@...LAB.COM>
To:	'Jesper Dangaard Brouer' <brouer@...hat.com>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>
CC:	David Miller <davem@...emloft.net>,
	Alexander Duyck <alexander.duyck@...il.com>,
	Alexei Starovoitov <alexei.starovoitov@...il.com>,
	Daniel Borkmann <borkmann@...earbox.net>,
	Marek Majkowski <marek@...udflare.com>,
	Hannes Frederic Sowa <hannes@...essinduktion.org>,
	Florian Westphal <fw@...len.de>,
	Paolo Abeni <pabeni@...hat.com>,
	John Fastabend <john.r.fastabend@...el.com>
Subject: RE: Optimizing instruction-cache, more packets at each stage

From: Jesper Dangaard Brouer
> Sent: 15 January 2016 13:22
...
> I want to do some instruction-cache level optimizations.
> 
> What do I mean by that...
> 
> The kernel network stack code path (a packet travels) is obviously
> larger than the instruction-cache (icache).  Today, every packet
> travel individually through the network stack, experiencing the exact
> same icache misses (as the previous packet).
...

Is that actually true for modern server processors that have large i-cache.
While the total size of the networking code may well be larger, that
part used for transmitting data packets will be much be smaller and
could easily fit in the icache.

	David