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Date: Wed, 3 Feb 2016 12:02:42 +0000 From: Paul Burton <paul.burton@...tec.com> To: <linux-mips@...ux-mips.org>, Ralf Baechle <ralf@...ux-mips.org> CC: Paul Burton <paul.burton@...tec.com>, <netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org> Subject: [PATCH v2 4/6] net: pch_gbe: Always reset PHY along with MAC On the MIPS Boston development board, the EG20T MAC does not report receiving the RX clock from the (RGMII) RTL8211E PHY unless the PHY is reset at the same time as the MAC. Since the pch_gbe driver resets the MAC a number of times - twice during probe, and when taking down the network interface - we need to reset the PHY at all the same times. Do that from pch_gbe_mac_reset_hw which is used to reset the MAC in all cases. Signed-off-by: Paul Burton <paul.burton@...tec.com> --- Changes in v2: None drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c index 23d28f0..824ff9e 100644 --- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c +++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c @@ -378,10 +378,13 @@ static void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw) { /* Read the MAC address. and store to the private data */ pch_gbe_mac_read_mac_addr(hw); + pch_gbe_phy_set_reset(hw, 1); iowrite32(PCH_GBE_ALL_RST, &hw->reg->RESET); #ifdef PCH_GBE_MAC_IFOP_RGMII iowrite32(PCH_GBE_MODE_GMII_ETHER, &hw->reg->MODE); #endif + pch_gbe_phy_set_reset(hw, 0); + usleep_range(1250, 1500); pch_gbe_wait_clr_bit(&hw->reg->RESET, PCH_GBE_ALL_RST); /* Setup the receive addresses */ pch_gbe_mac_mar_set(hw, hw->mac.addr, 0); -- 2.7.0
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