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Message-ID: <CAJ3xEMjbOAyzu_6B23HPJshY+p9Dm23P6Sr2SxA=caHz6iuk6A@mail.gmail.com>
Date: Tue, 16 Feb 2016 23:38:46 +0200
From: Or Gerlitz <gerlitz.or@...il.com>
To: Saeed Mahameed <saeedm@...lanox.com>
Cc: "David S. Miller" <davem@...emloft.net>,
Linux Netdev List <netdev@...r.kernel.org>,
Tal Alon <talal@...lanox.com>,
Eran Ben Elisha <eranbe@...lanox.com>,
Tariq Toukan <tariqt@...lanox.com>
Subject: Re: [PATCH net-next 04/12] net/mlx5e: Support DCBNL IEEE ETS
On Tue, Feb 16, 2016 at 10:09 PM, Saeed Mahameed <saeedm@...lanox.com>
> @@ -1602,7 +1622,7 @@ static int mlx5e_create_tis(struct mlx5e_priv
*priv, int tc)
>
> memset(in, 0, sizeof(in));
>
> - MLX5_SET(tisc, tisc, prio, tc);
> + MLX5_SET(tisc, tisc, prio, tc << 1);
point bug fix? or we could never hit that prior to the patch as ## TCs
was always 0?
> MLX5_SET(tisc, tisc, transport_domain, priv->tdn);
>
> return mlx5_core_create_tis(mdev, in, sizeof(in), &priv->tisn[tc]);
> @@ -1618,7 +1638,7 @@ static int mlx5e_create_tises(struct mlx5e_priv *priv)
> int err;
> int tc;
>
> - for (tc = 0; tc < priv->params.num_tc; tc++) {
> + for (tc = 0; tc < MLX5E_MAX_NUM_TC; tc++) {
> err = mlx5e_create_tis(priv, tc);
various places in the patch use priv->params.num_tc, wasn't sure if
it's correct to hard code things here, and if it does, why not hard
code everywhere
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