[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20160227.180403.2101360385050644823.davem@davemloft.net>
Date: Sat, 27 Feb 2016 18:04:03 -0500 (EST)
From: David Miller <davem@...emloft.net>
To: peter@...leysoftware.com
Cc: eric.dumazet@...il.com, edumazet@...gle.com,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
gregkh@...uxfoundation.org, dmaengine@...r.kernel.org,
john.ogness@...utronix.de, bigeasy@...utronix.de,
akpm@...ux-foundation.org
Subject: Re: Softirq priority inversion from "softirq: reduce latencies"
From: Peter Hurley <peter@...leysoftware.com>
Date: Sat, 27 Feb 2016 12:29:39 -0800
> Not really. softirq raised from interrupt context will always execute
> on this cpu and not in ksoftirqd, unless load forces softirq loop abort.
That guarantee never was specified.
Or are you saying that by design, on a system under load, your UART
will not function properly?
Surely you don't mean that.
Powered by blists - more mailing lists