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Message-Id: <1456737661-20538-3-git-send-email-ramesh.shanmugasundaram@bp.renesas.com>
Date: Mon, 29 Feb 2016 09:21:01 +0000
From: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@...renesas.com>
To: mkl@...gutronix.de, wg@...ndegger.com, horms@...ge.net.au,
magnus.damm@...il.com, robh+dt@...nel.org, pawel.moll@....com,
mark.rutland@....com, ijc+devicetree@...lion.org.uk,
galak@...eaurora.org
Cc: linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-can@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
netdev@...r.kernel.org, chris.paterson2@...esas.com,
Ramesh Shanmugasundaram <ramesh.shanmugasundaram@...renesas.com>
Subject: [PATCH 2/2] arm64: dts: r8a7795: Add CAN support
Adds CAN controller nodes for r8a7795.
Note: CAN channel register base address mentioned in R-Car Gen3 Hardware
User Manual v0.5E is incorrect. The corrected base addresses are:
CAN Channel 0 - 0xe6c30000
CAN Channel 1 - 0xe6c38000
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@...renesas.com>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 4049182..a88f8d8 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -523,6 +523,36 @@
#size-cells = <0>;
};
+ can0: can@...30000 {
+ compatible = "renesas,can-r8a7795",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c30000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ can1: can@...38000 {
+ compatible = "renesas,can-r8a7795",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c38000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
hscif0: serial@...40000 {
compatible = "renesas,hscif-r8a7795",
"renesas,rcar-gen3-hscif",
--
1.9.1
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