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Message-Id: <1457942520-12859-10-git-send-email-wxt@rock-chips.com> Date: Mon, 14 Mar 2016 16:02:00 +0800 From: Caesar Wang <wxt@...k-chips.com> To: Heiko Stuebner <heiko@...ech.de>, "David S. Miller" <davem@...emloft.net>, Rob Herring <robh+dt@...nel.org> Cc: linux-rockchip@...ts.infradead.org, keescook@...gle.com, leozwang@...gle.com, sergei.shtylyov@...entembedded.com, netdev@...r.kernel.org, Xing Zheng <zhengxing@...k-chips.com>, Caesar Wang <wxt@...k-chips.com>, linux-arm-kernel@...ts.infradead.org, Pawel Moll <pawel.moll@....com>, Mark Rutland <mark.rutland@....com>, Ian Campbell <ijc+devicetree@...lion.org.uk>, Kumar Gala <galak@...eaurora.org>, Russell King <linux@....linux.org.uk>, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org Subject: [PATCH v3 9/9] ARM: dts: rockchip: add to support emac for rk3036 SoCs From: Xing Zheng <zhengxing@...k-chips.com> This patch adds the emac device node for rk3036 SoCs. We need to let mac clock under the DPLL which is able to provide the accurate 50MHz what mac_ref need, since that will cause some unstable things if the cpufreq is working. Signed-off-by: Xing Zheng <zhengxing@...k-chips.com> Signed-off-by: Caesar Wang <wxt@...k-chips.com> Cc: linux-rockchip@...ts.infradead.org Cc: Xing Zheng <zhengxing@...k-chips.com> Cc: Heiko Stuebner <heiko@...ech.de> Cc: linux-arm-kernel@...ts.infradead.org --- Changes in v3: - rename reset-gpio to phy-reset-gpios. - change the commit. - remove the pcfg_output_high, that's really not needed for emac. - Add the Cc people. - Fixes the 'zhengxing' to 'Xing Zheng'. Changes in v2: - rename phy-reset-gpio to reset-gpios. arch/arm/boot/dts/rk3036-evb.dts | 14 ++++++++++++++ arch/arm/boot/dts/rk3036-kylin.dts | 14 ++++++++++++++ arch/arm/boot/dts/rk3036.dtsi | 39 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 67 insertions(+) diff --git a/arch/arm/boot/dts/rk3036-evb.dts b/arch/arm/boot/dts/rk3036-evb.dts index 28a0336..b3d6ec8 100644 --- a/arch/arm/boot/dts/rk3036-evb.dts +++ b/arch/arm/boot/dts/rk3036-evb.dts @@ -47,6 +47,20 @@ compatible = "rockchip,rk3036-evb", "rockchip,rk3036"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>; + phy = <&phy0>; + phy-reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; /* PHY_RST */ + phy-reset-duration = <10>; /* millisecond */ + + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + &i2c1 { status = "okay"; diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts index eb9c979..951f15d 100644 --- a/arch/arm/boot/dts/rk3036-kylin.dts +++ b/arch/arm/boot/dts/rk3036-kylin.dts @@ -112,6 +112,20 @@ status = "okay"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>; + phy = <&phy0>; + phy-reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; /* PHY_RST */ + phy-reset-duration = <10>; /* millisecond */ + + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + &emmc { status = "okay"; }; diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 90faa86..5175a2a 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -223,6 +223,27 @@ status = "disabled"; }; + emac: ethernet@...00000 { + compatible = "rockchip,rk3036-emac", "snps,arc-emac"; + reg = <0x10200000 0x4000>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + rockchip,grf = <&grf>; + clocks = <&cru HCLK_MAC>, <&cru SCLK_MACREF>, <&cru SCLK_MAC>; + clock-names = "hclk", "macref", "macclk"; + /* + * Fix the emac parent clock is DPLL instead of APLL. + * since that will cause some unstable things if the cpufreq + * is working. (e.g: the accurate 50MHz what mac_ref need) + */ + assigned-clocks = <&cru SCLK_MACPLL>; + assigned-clock-parents = <&cru PLL_DPLL>; + max-speed = <100>; + phy-mode = "rmii"; + status = "disabled"; + }; + sdmmc: dwmmc@...14000 { compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10214000 0x4000>; @@ -628,6 +649,24 @@ }; }; + emac { + emac_xfer: emac-xfer { + rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_default>, /* crs_dvalid */ + <2 13 RK_FUNC_1 &pcfg_pull_default>, /* tx_en */ + <2 14 RK_FUNC_1 &pcfg_pull_default>, /* mac_clk */ + <2 15 RK_FUNC_1 &pcfg_pull_default>, /* rx_err */ + <2 16 RK_FUNC_1 &pcfg_pull_default>, /* rxd1 */ + <2 17 RK_FUNC_1 &pcfg_pull_default>, /* rxd0 */ + <2 18 RK_FUNC_1 &pcfg_pull_default>, /* txd1 */ + <2 19 RK_FUNC_1 &pcfg_pull_default>; /* txd0 */ + }; + + emac_mdio: emac-mdio { + rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_default>, /* mac_md */ + <2 25 RK_FUNC_1 &pcfg_pull_default>; /* mac_mdclk */ + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>, -- 1.9.1
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