netdev - Re: [PATCH 1/6] bus: Add shared MDIO bus framework

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Message-ID: <9424602.Vqb0FY56gH@wuerfel>
Date:	Tue, 26 Apr 2016 21:24:34 +0200
From:	Arnd Bergmann <arnd@...db.de>
To:	Andrew Lunn <andrew@...n.ch>
Cc:	Florian Fainelli <f.fainelli@...il.com>,
	Pramod Kumar <pramod.kumar@...adcom.com>,
	Rob Herring <robh+dt@...nel.org>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will.deacon@....com>,
	Masahiro Yamada <yamada.masahiro@...ionext.com>,
	Chen-Yu Tsai <wens@...e.org>,
	Mark Rutland <mark.rutland@....com>,
	devicetree@...r.kernel.org, Pawel Moll <pawel.moll@....com>,
	Suzuki K Poulose <suzuki.poulose@....com>,
	netdev@...r.kernel.org, Punit Agrawal <punit.agrawal@....com>,
	linux-kernel@...r.kernel.org,
	BCM Kernel Feedback <bcm-kernel-feedback-list@...adcom.com>,
	linux-arm-kernel@...ts.infradead.org,
	Anup Patel <anup.patel@...adcom.com>,
	Kishon Vijay Abraham I <kishon@...com>
Subject: Re: [PATCH 1/6] bus: Add shared MDIO bus framework

On Tuesday 26 April 2016 20:23:35 Andrew Lunn wrote:
> > A more complex problem would be having a PHY driver for a device
> > that can be either an ethernet phy or some other phy.
> 
> I doubt that ever happens. You can have up to 32 different devices on
> an MDIO bus. Since an Ethernet PHY and a "some other sort of PHY" are
> completely different things, why would a hardware engineer place them
> on the same address? It is like saying your ATA controller and VGA
> controller share the same slot on the PCI bus...

To clarify: what I meant is a device that is designed as a PHY for
similar hardware (e.g. SATA, USB3 and PCIe) and that has a common
register set and a single driver, but that driver can operate
in multiple modes. You typically have multiple instances of
such hardware, with each instance linked to exactly one host
device, but one driver for all of them.

See Documentation/devicetree/bindings/phy/apm-xgene-phy.txt
and drivers/phy/phy-xgene.c for one such example.

	Arnd