netdev - RE: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver

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Message-ID: <9231D502B07C5E4A8B32D5115C9F19991E917469@IRSMSX101.ger.corp.intel.com>
Date:	Mon, 23 May 2016 09:12:54 +0000
From:	"Mehrtens, Hauke" <hauke.mehrtens@...el.com>
To:	Alexander Stein <alexander.stein@...tec-electronic.com>,
	Mathias Kresin <openwrt@...sin.me>
CC:	John Crispin <john@...ozen.org>,
	Florian Fainelli <f.fainelli@...il.com>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"andrew@...n.ch" <andrew@...n.ch>,
	Hauke Mehrtens <hauke@...ke-m.de>
Subject: RE: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver

Hi Alexander,

> -----Original Message-----
> From: Alexander Stein [mailto:alexander.stein@...tec-electronic.com]
> Sent: Thursday, May 19, 2016 12:22 PM
> To: Mathias Kresin <openwrt@...sin.me>
> Cc: John Crispin <john@...ozen.org>; Florian Fainelli <f.fainelli@...il.com>;
> netdev@...r.kernel.org; linux-kernel@...r.kernel.org; andrew@...n.ch;
> Mehrtens, Hauke <hauke.mehrtens@...el.com>
> Subject: Re: [PATCH 1/1 RFC] net/phy: Add Lantiq PHY driver
> 
> On Thursday 19 May 2016 12:03:10, Mathias Kresin wrote:
> > 2016-05-19 9:03 GMT+02:00 John Crispin <john@...ozen.org>:
> > > On 19/05/2016 08:57, Alexander Stein wrote:
> > >> Thanks for the link, I wasn't aware of that patch. I like it in
> > >> general, but there are some things I'd like to get addressed first:
> > >> * vr9_gphy_of_reg_init() writes uncoditionally to led3h and led3l
> > >> even on
> > >>
> > >>   PEf7071 which does not have this register at all
> > >
> > > we use this driver mainly on the 11g and 22f version. mathias
> > > recently added the led3 handling.
> > >
> > > @Mathias, can you have a look at this and fix it inside the lede tree ?
> >
> > Well, I haven't added the led3 handling, I've only changed the initial
> > value (function) of led3.
> >
> > Maybe it's cleaner to not use a default value for the led function and
> > completely rely on the device tree bindings. But by adjusting the
> > initial values, I had to change only the led function of one board in
> > the openwrt xrx200 subtarget instead of touching all dts files.
> 
> I think setting default values is good.

The registers are set to some reset values after the chip is coming out of reset, but we should set  them all to the same value, Mathias said that all except for one board he knows are using only one LED per port, but they are often using different LED pins, I will change my patch.

> > I know that the LTQ Datasheet for the PEF 7071 Version 1.5 mentions
> > the led3 control register albeit there is no pin for a forth led. So I
> > guess it's safe to write to the led3 register even for the PEF 7071.
> 
> Mh, my PEF 7071 User Manual (Version 2.0, 2012-10-17) doesn't mention
> LED3x registers. There is LED3DA and LED3EN in PHY_LED but was removed in
> 1.6 manual.

LED3x is only available in PEF 7072 which is a different package with more pins for the LED3 and some other interfaces.

> I think, some flag if the PHY supports LED3 and depend on that is just fine.

I do not know how to distinguish between PEF 7071 and PEF 7072.

Hauke