netdev - Re: [PATCH] [v5] net: emac: emac gigabit ethernet controller driver

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Date:	Mon, 20 Jun 2016 13:04:25 -0500
From:	Shanker Donthineni <shankerd@...eaurora.org>
To:	Timur Tabi <timur@...eaurora.org>, Rob Herring <robh@...nel.org>
Cc:	netdev@...r.kernel.org, devicetree@...r.kernel.org,
	linux-arm-msm@...r.kernel.org, sdharia@...eaurora.org,
	vikrams@...eaurora.org, cov@...eaurora.org, gavidov@...eaurora.org,
	andrew@...n.ch, bjorn.andersson@...aro.org, mlangsdo@...hat.com,
	jcm@...hat.com, agross@...eaurora.org, davem@...emloft.net,
	f.fainelli@...il.com
Subject: Re: [PATCH] [v5] net: emac: emac gigabit ethernet controller driver

Timur,

I think, the device driver is responsible for setting the right DMA_MASK 
based on the underlying hardware capability if your driver wants to 
support 64bit DMA.

Example code in drivers/usb/host/xhci.c:

         /* Set dma_mask and coherent_dma_mask to 64-bits,
          * if xHC supports 64-bit addressing */
         if (HCC_64BIT_ADDR(xhci->hcc_params) &&
                         !dma_set_mask(dev, DMA_BIT_MASK(64))) {
                 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
                 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
         } else {
                 /*
                  * This is to avoid error in cases where a 32-bit USB
                  * controller is used on a 64-bit capable system.
                  */
                 retval = dma_set_mask(dev, DMA_BIT_MASK(32));



On 06/20/2016 12:41 PM, Timur Tabi wrote:
> Rob Herring wrote:
>>> >+        dma-ranges = <0 0 0xffffffff>;
>> I believe dma-ranges is supposed to be in the bus (parent) node.
>
> Maybe I'm just going to be perpetually confused by dma-ranges, but how 
> can I specify that the emac has a different DMA range from another SOC 
> device, if dma-ranges is in the parent node?
>
> The EMAC itself is capable of 64-bit DMA internally (I should have 
> included a dma_set_mask call with DMA_BIT_MASK(64) in the driver). 
> However, the platform typically limits this range.  On FSM9900 and 
> QDF2432, it's 32 bits.  On the next server chip, it'll be the full 64 
> bits.  I need some way to handle that.
>

-- 
Shanker Donthineni
Qualcomm Technologies, Inc. on behalf of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project