netdev - Re: [PATCH net-next 7/9] net/mlx5e: Add 50G missing link mode to ethtool and mlx5 driver

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Message-ID: <CAG88wWZW3xgYyP9z4=T7WnPy8wCdHZwxNYGw78QR-n8d7ujaHQ@mail.gmail.com>
Date:	Wed, 22 Jun 2016 09:47:40 -0700
From:	David Decotigny <decot@...glers.com>
To:	Saeed Mahameed <saeedm@...lanox.com>
Cc:	"David S. Miller" <davem@...emloft.net>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	Or Gerlitz <ogerlitz@...lanox.com>,
	Gal Pressman <galp@...lanox.com>,
	Ben Hutchings <bwh@...nel.org>
Subject: Re: [PATCH net-next 7/9] net/mlx5e: Add 50G missing link mode to
 ethtool and mlx5 driver

maybe split this into 2 separate patches?

On Wed, Jun 22, 2016 at 9:33 AM, Saeed Mahameed <saeedm@...lanox.com> wrote:
> From: Gal Pressman <galp@...lanox.com>
>
> Add ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT and MLX5E_50GBASE_SR2
> bits.
>
> Signed-off-by: Gal Pressman <galp@...lanox.com>
> CC: Ben Hutchings <bwh@...nel.org>
> CC: David Decotigny <decot@...glers.com>
> Signed-off-by: Saeed Mahameed <saeedm@...lanox.com>
> ---
>  drivers/net/ethernet/mellanox/mlx5/core/en.h | 1 +
>  include/uapi/linux/ethtool.h                 | 3 ++-
>  2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h
> index aa36a3a..b8732e6 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h
> @@ -616,6 +616,7 @@ enum mlx5e_link_mode {
>         MLX5E_10GBASE_ER         = 14,
>         MLX5E_40GBASE_SR4        = 15,
>         MLX5E_40GBASE_LR4        = 16,
> +       MLX5E_50GBASE_SR2        = 18,
>         MLX5E_100GBASE_CR4       = 20,
>         MLX5E_100GBASE_SR4       = 21,
>         MLX5E_100GBASE_KR4       = 22,
> diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h
> index 5f030b4..b8f38e8 100644
> --- a/include/uapi/linux/ethtool.h
> +++ b/include/uapi/linux/ethtool.h
> @@ -1362,6 +1362,7 @@ enum ethtool_link_mode_bit_indices {
>         ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT        = 37,
>         ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT        = 38,
>         ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT    = 39,
> +       ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT         = 40,
>
>         /* Last allowed bit for __ETHTOOL_LINK_MODE_LEGACY_MASK is bit
>          * 31. Please do NOT define any SUPPORTED_* or ADVERTISED_*
> @@ -1370,7 +1371,7 @@ enum ethtool_link_mode_bit_indices {
>          */
>
>         __ETHTOOL_LINK_MODE_LAST
> -         = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
> +         = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
>  };
>
>  #define __ETHTOOL_LINK_MODE_LEGACY_MASK(base_name)     \
> --
> 2.8.0
>