netdev - Re: [PATCH] [v6] net: emac: emac gigabit ethernet controller driver

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Message-ID: <5301045.3F9gkJcz60@wuerfel>
Date:	Wed, 29 Jun 2016 10:17:07 +0200
From:	Arnd Bergmann <arnd@...db.de>
To:	Timur Tabi <timur@...eaurora.org>
Cc:	netdev@...r.kernel.org, devicetree@...r.kernel.org,
	linux-arm-msm@...r.kernel.org, sdharia@...eaurora.org,
	shankerd@...eaurora.org, vikrams@...eaurora.org,
	cov@...eaurora.org, gavidov@...eaurora.org, robh+dt@...nel.org,
	andrew@...n.ch, bjorn.andersson@...aro.org, mlangsdo@...hat.com,
	jcm@...hat.com, agross@...eaurora.org, davem@...emloft.net,
	f.fainelli@...il.com
Subject: Re: [PATCH] [v6] net: emac: emac gigabit ethernet controller driver

On Friday, June 24, 2016 6:46:48 PM CEST Timur Tabi wrote:
> +       /* The EMAC itself is capable of 64-bit DMA. If the SOC limits that
> +        * range, then we expect platform code to adjust the mask accordingly.
> +        */
> +       ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
> +       if (ret) {
> +               dev_err(&pdev->dev, "could not set DMA mask\n");
> +               return ret;
> +       }
> 

The comment does not match the code: if the platform has no IOMMU
and the bus limit is smaller than the memory, dma_set_mask_and_coherent()
will fail, and the driver should instead ensure that the buffers are
allocated from the 32-bit area.

Alternatively, adjust the comment to explain that this is a limitation
in the driver that can be lifted if necessary.

	Arnd