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Date:	Sat, 16 Jul 2016 21:44:08 -0700 (PDT)
From:	David Miller <>
Subject: Re: [PATCH v1 0/3] Add Hisilicon MDIO bus driver and FEMAC driver

From: Dongpo Li <>
Date: Fri, 15 Jul 2016 16:26:32 +0800

> This patch set adds a Hisilicon MDIO bus driver and
> a Fast Ethernet MAC(FEMAC) driver.
> We also abstract a general interface "of_phy_get_and_connect"
> for PHY connect. User will have no bother with getting
> "phy-mode" and "phy-handle" any more.
> Changes in v1:
> - Pass private data structure instead of struct mii_bus
>   in MDIO read and write operation.
> - Return the error which devm_clk_get() gives when MDIO probe.
> - Leave the clock unprepared and disabled on error when MDIO probe.
> - Abstract a general interface "of_phy_get_and_connect" for PHY connect.
> - Remove the "_reset" suffixes in "reset-names" property.
> - Enable tx per-packet interrupt when tx fifo full.
> - Remove pointless compatible and add SoC specific compatible.
> - Declare only one clock in MAC dts documentation.
> - Add standard unit suffixes for "phy-reset-delays".
> - Use a smaller NAPI poll weight 16 for our Fast Ethernet MAC.
> - Use phy_ethtool_{get|set}_link_ksettings for ethtool ops.
> - Use phydev from struct net_device in MAC driver.

Series applied, thanks.

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