netdev - [PATCH 0/3] ARM64: meson: Meson8b and GXBB DWMAC glue driver

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Message-Id: <20160815164100.27766-1-martin.blumenstingl@googlemail.com>
Date:	Mon, 15 Aug 2016 18:40:57 +0200
From:	Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To:	linux-amlogic@...ts.infradead.org, khilman@...libre.com,
	carlo@...one.org, mturquette@...libre.com, peppe.cavallaro@...com,
	alexandre.torgue@...com
Cc:	robh+dt@...nel.org, mark.rutland@....com, catalin.marinas@....com,
	will.deacon@....com, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: [PATCH 0/3] ARM64: meson: Meson8b and GXBB DWMAC glue driver

This adds a DWMAC glue driver for the PRG_ETHERNET registers found in
Meson8b and GXBB SoCs. Based on the "old" meson6b-dwmac glue driver
the register layout is completely different.
Thus I introduced a separate driver.

Changes compared to the RFC version:
- switch from syscon / regmap to assigning the corresponding register
  region directly to the driver (like meson6-dwmac does it)
- dropped "fix_mac_speed" callback since the reference driver does not
  implement it (I could not test if it is required due to lack of
  hardware)
- switch to common clock framework now that we know what bits 5:4
  (mux clock), 6:5 (250MHz divider) and 10 (configurable 5 or 10
  divider) are used for
- Removed dts property "amlogic,mp2-clock" because it is now part of
  the clocks which are registered by the glue driver
- Removed dts properties "amlogic,enable-tx-phy-ref-clk" and
  "amlogic,tx-delay" because it seems we can guess them based on the
  phy-mode (the original Amlogic dts files only supply two different
  values: one value for the internal RMII PHY and another one for the
  external RGMII Gbit PHY).
  If required we can extend the code in the future to make these
  configurable.
- This means that the only Meson8b / GXBB specific part of the binding
  is the clkin0 (FCLK_DIV2) clock, as it's needed for the mux clock.
  Everything else is auto-detected based on the phy-mode (which is
  already mandatory in stmmac).

I have successfully tested this on a Vega S95 Meta clone which comes
with a "broken" bootloader (which programs the ethernet registers to
"Fast Ethernet / RGMII" mode, while the board has a Realtek Gbit PHY).
Before this series stmmac was detected, I got a network interface but
no traffic was flowing.

Due to lack of hardware I could not test this on a device which uses
the internal RMII (Fast Ethernet) PHY.


Martin Blumenstingl (3):
  net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings
  net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC
  ARM64: dts: meson-gxbb: use the new GXBB DWMAC glue driver

 .../devicetree/bindings/net/meson-dwmac.txt        |  43 ++-
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi        |   7 +-
 drivers/net/ethernet/stmicro/stmmac/Makefile       |   2 +-
 .../net/ethernet/stmicro/stmmac/dwmac-meson8b.c    | 327 +++++++++++++++++++++
 4 files changed, 367 insertions(+), 12 deletions(-)
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c

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