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Message-ID: <4041259.IszN4229Cj@wuerfel>
Date: Mon, 22 Aug 2016 17:25:30 +0200
From: Arnd Bergmann <arnd@...db.de>
To: linux-arm-kernel@...ts.infradead.org
Cc: Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
mark.rutland@....com, devicetree@...r.kernel.org,
sboyd@...eaurora.org, catalin.marinas@....com,
alexandre.torgue@...com, khilman@...libre.com,
mturquette@...libre.com, will.deacon@....com, robh+dt@...nel.org,
peppe.cavallaro@...com, carlo@...one.org,
linux-amlogic@...ts.infradead.org, netdev@...r.kernel.org
Subject: Re: [PATCH v2 1/4] net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings
On Monday, August 22, 2016 2:04:49 PM CEST Martin Blumenstingl wrote:
> On Mon, Aug 22, 2016 at 1:55 PM, Arnd Bergmann <arnd@...db.de> wrote:
> > On Saturday, August 20, 2016 11:35:35 AM CEST Martin Blumenstingl wrote:
> >> +- reg: The first register range should be the one of the DWMAC
> >> + controller. The second range is is for the Amlogic specific
> >> + configuration (for example the PRG_ETHERNET register range
> >> + on Meson8b and newer)
> >>
> > ...
> >
> >> +Example for GXBB:
> >> + ethmac: ethernet@...10000 {
> >> + compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
> >> + reg = <0x0 0xc9410000 0x0 0x10000>,
> >> + <0x0 0xc8834540 0x0 0x8>;
> >>
> >
> > The address "0xc8834540" suggests that this is part of a larger register
> > range that is used for various things, i.e. a "syscon" type of device.
> You are right, these are part of the cbus range (which is already
> defined in meson-gxbb.dtsi)
>
> > How about making this a syscon reference rather than a "reg" address?
> The first version of my patch ([0]) used
> syscon_regmap_lookup_by_phandle. Maybe I did it wrong (and I should
> have passed the cbus syscon-node instead of defining a new one just
> for the 2x32bit PRG_ETHERNET registers).
> I am perfectly fine with either way - however it seems that some other
> dwmac glue implementations are also using a second set of resources
> (that doesn't automatically make it "correct" though).
It really depends on the kind of SoC. Some may have a suboptimal
binding, on some others there may be a distinct register area that
just contains a few additional registers for the dwmac.
Arnd
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