netdev - Re: [RESEND PATCH net 06/10] net: ethernet: mediatek: fix the loss

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Message-ID: <1472182419-17998-1-git-send-email-sean.wang@mediatek.com>
Date:   Fri, 26 Aug 2016 11:33:39 +0800
From:   Sean Wang <sean.wang@...iatek.com>
To:     <andrew@...n.ch>
CC:     <john@...ozen.org>, <davem@...emloft.net>, <nbd@...nwrt.org>,
        <netdev@...r.kernel.org>, <linux-mediatek@...ts.infradead.org>,
        <keyhaede@...il.com>
Subject: Re: [RESEND PATCH net 06/10] net: ethernet: mediatek: fix the loss

On Thu, 25 Aug 2016 15:30:34 +0200, Andrew Lunn wrote:
>On Thu, Aug 25, 2016 at 06:44:57PM +0800, Sean Wang wrote:
>> ommited the setting about pin-mux which results in incorrect signals
>> being routed on GMAC2.
>
>Hi Sean
>
>Please could you explain this some more. I don't know too much about
>pinctrl, but i've never seen a driver have to do anything with it. The
>core driver code handles it all, selecting the default state. See
>seeing this here makes me wonder if it is correct.
>
>Thanks
>	Andrew
>
>>

Hi Andrew,

Here pinctrl is used to setup what function the group of the pins is for.

The group of the pins could be configured for the function provided 
by the SoC, such as general purpose I/O or specific function such as
ethernet depending on what products or boards you design for various 
customers or vendors. Thanks for device tree introducing, it is easy 
to find what resources the board needs including the pins usage is 
also defined here.
 
Pins are limited resource that is also meant for the cost 
so that it is common way seen on embedded system.

thanks,
Sean

>> +	eth->pins = devm_pinctrl_get(&pdev->dev);
>> +	if (IS_ERR(eth->pins)) {
>> +		dev_err(&pdev->dev, "cannot get pinctrl\n");
>> +		return PTR_ERR(eth->pins);
>> +	}
>> +
>> +	eth->ephy_default =
>> +		pinctrl_lookup_state(eth->pins, "default");
>> +	if (IS_ERR(eth->ephy_default)) {
>> +		dev_err(&pdev->dev, "cannot get pinctrl state\n");
>> +		return PTR_ERR(eth->ephy_default);
>> +	}
>> +
>>  	clk_prepare_enable(eth->clk_ethif);
>>  	clk_prepare_enable(eth->clk_esw);
>>  	clk_prepare_enable(eth->clk_gp1);
>> diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
>> index f82e3ac..13d3f1b 100644
>> --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
>> +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
>> @@ -404,6 +404,9 @@ struct mtk_eth {
>>  	struct clk			*clk_esw;
>>  	struct clk			*clk_gp1;
>>  	struct clk			*clk_gp2;
>> +	struct pinctrl			*pins;
>> +	struct pinctrl_state		*ephy_default;
>> +
>>  	struct mii_bus			*mii_bus;
>>  	struct work_struct		pending_work;
>>  };
>> -- 
>> 1.9.1