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Message-Id: <20160906213848.17785-3-martin.blumenstingl@googlemail.com>
Date: Tue, 6 Sep 2016 23:38:44 +0200
From: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To: linux-amlogic@...ts.infradead.org, khilman@...libre.com,
carlo@...one.org, mturquette@...libre.com, peppe.cavallaro@...com,
alexandre.torgue@...com
Cc: robh+dt@...nel.org, mark.rutland@....com, catalin.marinas@....com,
will.deacon@....com, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
sboyd@...eaurora.org, manabian@...il.com, arnd@...db.de,
davem@...emloft.net, b.galvani@...il.com,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: [PATCH v5 2/6] clk: gxbb: expose MPLL2 clock for use by DT
This exposes the MPLL2 clock as this is one of the input clocks of the
ethernet controller's internal mux.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
---
drivers/clk/meson/gxbb.h | 2 +-
include/dt-bindings/clock/gxbb-clkc.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
index 217df51..3606e875 100644
--- a/drivers/clk/meson/gxbb.h
+++ b/drivers/clk/meson/gxbb.h
@@ -183,7 +183,7 @@
/* CLKID_CLK81 */
#define CLKID_MPLL0 13
#define CLKID_MPLL1 14
-#define CLKID_MPLL2 15
+/* CLKID_MPLL2 */
#define CLKID_DDR 16
#define CLKID_DOS 17
#define CLKID_ISA 18
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
index 7d41864..244ea6e 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -8,6 +8,7 @@
#define CLKID_CPUCLK 1
#define CLKID_FCLK_DIV2 4
#define CLKID_CLK81 12
+#define CLKID_MPLL2 15
#define CLKID_ETH 36
#define CLKID_SD_EMMC_A 94
#define CLKID_SD_EMMC_B 95
--
2.9.3
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