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Message-Id: <20160910.211205.2263493847383395899.davem@davemloft.net>
Date:   Sat, 10 Sep 2016 21:12:05 -0700 (PDT)
From:   David Miller <davem@...emloft.net>
To:     chris.brandt@...esas.com
Cc:     sergei.shtylyov@...entembedded.com, horms+renesas@...ge.net.au,
        geert+renesas@...der.be, daniel@...f.com, netdev@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org
Subject: Re: [PATCH v2] net: ethernet: renesas: sh_eth: add POST registers
 for rz

From: Chris Brandt <chris.brandt@...esas.com>
Date: Wed,  7 Sep 2016 14:57:09 -0400

> Due to a mistake in the hardware manual, the FWSLC and POST1-4 registers
> were not documented and left out of the driver for RZ/A making the CAM
> feature non-operational.
> Additionally, when the offset values for POST1-4 are left blank, the driver
> attempts to set them using an offset of 0xFFFF which can cause a memory
> corruption or panic.
> 
> This patch fixes the panic and properly enables CAM.
> 
> Reported-by: Daniel Palmer <daniel@...f.com>
> Signed-off-by: Chris Brandt <chris.brandt@...esas.com>

Applied, thanks.

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