[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20160915134926.GA27352@localhost.localdomain>
Date: Thu, 15 Sep 2016 15:49:26 +0200
From: Richard Cochran <richardcochran@...il.com>
To: Grygorii Strashko <grygorii.strashko@...com>
Cc: "David S. Miller" <davem@...emloft.net>, netdev@...r.kernel.org,
Mugunthan V N <mugunthanvnm@...com>,
Sekhar Nori <nsekhar@...com>, linux-kernel@...r.kernel.org,
linux-omap@...r.kernel.org, WingMan Kwok <w-kwok2@...com>
Subject: Re: [PATCH 7/9] net: ethernet: ti: cpts: calc mult and shift from
refclk freq
On Thu, Sep 15, 2016 at 01:58:15PM +0200, Richard Cochran wrote:
> Can the input clock be higher than 1 GHz? If not, I suggest using
> clocks_calc_mult_shift() with maxsec=4 and a setting the watchdog also
> to 4*HZ.
On second thought, with the new 12% timer batching, using 4*HZ for 32
bits of 1 GHz is cutting it too close. So just keep it like you had
it, with maxsec=mask/freq and timeout=maxsec/2, to stay on the safe
side.
Thanks,
Richard
Powered by blists - more mailing lists