netdev - Re: [PATCH net-next 2/2] net: phy: Add PHY Auto/Mdi/Mdix set driver for Microsemi PHYs.

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Message-ID: <20160928202451.GC30728@lunn.ch>
Date:   Wed, 28 Sep 2016 22:24:51 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Raju Lakkaraju <Raju.Lakkaraju@...rosemi.com>
Cc:     netdev@...r.kernel.org, f.fainelli@...il.com,
        Allan.Nielsen@...rosemi.com
Subject: Re: [PATCH net-next 2/2] net: phy: Add PHY Auto/Mdi/Mdix set driver
 for Microsemi PHYs.

> +	reg_val = phy_read(phydev, MSCC_PHY_BYPASS_CONTROL);
> +	if ((mdix == ETH_TP_MDI) || (mdix == ETH_TP_MDI_X)) {
> +		reg_val |= (DISABLE_PAIR_SWAP_CORR_MASK |
> +			    DISABLE_POLARITY_CORR_MASK  |
> +			    DISABLE_HP_AUTO_MDIX_MASK);
> +	} else {
> +		reg_val &= ~(DISABLE_PAIR_SWAP_CORR_MASK |
> +			     DISABLE_POLARITY_CORR_MASK  |
> +			     DISABLE_HP_AUTO_MDIX_MASK);
> +	}
> +	rc = phy_write(phydev, MSCC_PHY_BYPASS_CONTROL, reg_val);
> +	if (rc != 0)
> +		goto out_unlock;
> +
> +	rc = vsc85xx_phy_page_set(phydev, MSCC_PHY_PAGE_EXTENDED);
> +	if (rc != 0)
> +		goto out_unlock;
> +
> +	reg_val = phy_read(phydev, MSCC_PHY_EXT_MODE_CNTL);
> +	reg_val &= ~(FORCE_MDI_CROSSOVER_MASK);
> +	if (mdix == ETH_TP_MDI)
> +		reg_val |= FORCE_MDI_CROSSOVER_MDI;
> +	else if (mdix == ETH_TP_MDI_X)
> +		reg_val |= FORCE_MDI_CROSSOVER_MDIX;
> +	rc = phy_write(phydev, MSCC_PHY_EXT_MODE_CNTL, reg_val);
> +	if (rc != 0)
> +		goto out_unlock;
> +
> +	rc = vsc85xx_phy_page_set(phydev, MSCC_PHY_PAGE_STANDARD);
> +
> +out_unlock:

out_unlock seems a bit of an odd name, since you are not unlocking
anything.

I also wonder if you should try to reset to MSCC_PHY_PAGE_STANDARD in
the error condition?

> +
> +	return rc;
> +}
> +
>  static int vsc85xx_wol_set(struct phy_device *phydev,
>  			   struct ethtool_wolinfo *wol)
>  {
> @@ -227,6 +281,7 @@ static int vsc85xx_default_config(struct phy_device *phydev)
>  	int rc;
>  	u16 reg_val;
>  
> +	phydev->mdix = ETH_TP_MDI_AUTO;

Humm, interesting. The only other driver supporting mdix is the
Marvell one. It does not do this, it leaves it to its default value of
ETH_TP_MDI_INVALID. It does however interpret ETH_TP_MDI_INVALID as
meaning as ETH_TP_MDI_AUTO.

There needs to be consistency here. You either need to do the same as
the Marvell driver, or you need to modify the Marvell driver to also
set phydev->mdix to ETH_TP_MDI_AUTO.

I don't yet know which of these two is the right thing to do.

Florian?

	Andrew