netdev - Re: [PATCH v2 1/3] net: smc91x: isolate u16 writes alignment workaround

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Message-ID: <87zimc7m2d.fsf@belgarion.home>
Date:   Mon, 10 Oct 2016 08:30:34 +0200
From:   Robert Jarzmik <robert.jarzmik@...e.fr>
To:     Andy Shevchenko <andy.shevchenko@...il.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Nicolas Pitre <nico@...xnic.net>,
        Russell King - ARM Linux <linux@...linux.org.uk>,
        Arnd Bergmann <arnd@...db.de>, netdev <netdev@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        "linux-kernel\@vger.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/3] net: smc91x: isolate u16 writes alignment workaround

Andy Shevchenko <andy.shevchenko@...il.com> writes:

>> +#define SMC_outw(lp, v, a, r)                                          \
>> +       _SMC_outw_align4((v), (a), (r),                                 \
>> +                        IS_BUILTIN(CONFIG_ARCH_PXA) && ((r) & 2) &&    \
>> +                        lp->half_word_align4)
>
> Hmm... Isn't enough to have just (r) & 2 && lp->half_word_align4 ?

It wouldn't be equivalent to what we had before.

The point of the previous code was to compile out as much as possible of this
test. Therefore, at compilation time for omap1 boards, the compiler would
evaluate the test to 0, and never leave the workaround code compiled.

So it would be enough, but worse performance wise and not equivalent for non-pxa
boards, hence this test.

Cheers.

-- 
Robert