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Date:   Sat, 15 Oct 2016 09:39:12 -0500
From:   Timur Tabi <timur@...eaurora.org>
To:     Florian Fainelli <f.fainelli@...il.com>,
        Andrew Lunn <andrew@...n.ch>
Cc:     netdev@...r.kernel.org
Subject: Re: Need help with mdiobus_register and phy

Florian Fainelli wrote:
> After reading the spec again, it does not appear to me that a PHY
> with PDOWN set is guaranteed or even required to respond to other
> register reads such as MII_PHYID1/2, in which case we may have to
> implement a MDIO bus reset routine which clears PDOWN for all PHYs
> that we detect(ed), or as Andrew suggested, utilize the matching by
> compatible string with the PHY OUI in it.

The 8031 does respond normally when PDOWN is set.  However, the ID 
registers are not available when the SerDes bus is also powered down. 
I'll call this PDOWN+.  This is a special power-down sequence that the 
at803x driver does on suspend.  See my other email for details.

-- 
Sent by an employee of the Qualcomm Innovation Center, Inc.
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