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Message-ID: <fec6f014-9d5d-8d5b-22f1-c3fe81ab35ee@amd.com>
Date: Tue, 15 Nov 2016 08:17:26 -0600
From: Tom Lendacky <thomas.lendacky@....com>
To: Colin Ian King <colin.king@...onical.com>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"David S. Miller" <davem@...emloft.net>
Subject: Re: amd-xgbe: Add support for MDIO attached PHYs
On 11/15/2016 7:07 AM, Colin Ian King wrote:
> Hi,
>
> Commit:
>
> amd-xgbe: Add support for MDIO attached PHYs
>
> Use the phylib support in the kernel to communicate with and control an
> MDIO attached PHY. Use the hardware's MDIO communication mechanism to
> communicate with the PHY.
>
>
> +static int xgbe_clr_gpio(struct xgbe_prv_data *pdata, unsigned int gpio)
> +{
> + unsigned int reg;
> +
> + if (gpio > 16)
> + return -EINVAL;
>
> is gpio in the range 0..15?
>
> if (gpio > 15)
> return -EINVAL;
Yes, the GPIO range is 0 to 15. I'll submit a patch to change the
constraint check.
Thanks,
Tom
>
> +
> + reg = XGMAC_IOREAD(pdata, MAC_GPIOSR);
> +
> + reg &= ~(1 << (gpio + 16));
>
> if gpio is 16, we get 1 << 32 which I believe is undefined behaviour.
>
> + XGMAC_IOWRITE(pdata, MAC_GPIOSR, reg);
> +
> + return 0;
> +}
>
>
> Same applies for function xgbe_clr_gpio().
>
> Colin
>
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