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Message-ID: <87k2bvzg5k.fsf@ketchup.i-did-not-set--mail-host-address--so-tickle-me>
Date: Tue, 22 Nov 2016 10:29:59 -0500
From: Vivien Didelot <vivien.didelot@...oirfairelinux.com>
To: Florian Fainelli <f.fainelli@...il.com>, netdev@...r.kernel.org
Cc: davem@...emloft.net, bridge@...ts.linux-foundation.org,
stephen@...workplumber.org, andrew@...n.ch, jiri@...lanox.com,
idosch@...lanox.com, Florian Fainelli <f.fainelli@...il.com>
Subject: Re: [RFC net-next 0/3] net: bridge: Allow CPU port configuration
Hi Florian,
Florian Fainelli <f.fainelli@...il.com> writes:
> This patch series allows using the bridge master interface to configure
> an Ethernet switch port's CPU/management port with different VLAN attributes than
> those of the bridge downstream ports/members.
>
> Jiri, Ido, Andrew, Vivien, please review the impact on mlxsw and mv88e6xxx, I
> tested this with b53 and a mockup DSA driver.
Patchset looks fine to me overall. I'm cooking a patch similar to 3/3
for mv88e6xxx to put on top of this patchset.
Minor comments in individual patchs will follow.
> Open questions:
>
> - if we have more than one bridge on top of a physical switch, the driver
> should keep track of that and verify that we are not going to change
> the CPU port VLAN attributes in a way that results in incompatible settings
> to be applied
In mv88e6xxx, mv88e6xxx_port_check_hw_vlan() does that. It needs a small
adjustment though.
> - if the default behavior is to have all VLANs associated with the CPU port
> be ingressing/egressing tagged to the CPU, is this really useful?
I have no strong opinion on this. Intuitively I'd expect the CPU port to
be excluded until I add it myself, but I didn't think much about it.
Thanks,
Vivien
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